1. Field of Invention
The present invention generally concerns power conversion, and specifically concerns a fixed frequency DC to DC power converter operating with zero voltage switching (turn-on and turn-off) from a no load operation to a full load operation while electrically isolating the input stage from the output stage for safety and load voltage matching.
2. Description of the Prior Art
Power converters are used in numerous industrial and consumer applications to convert a first (input) DC voltage into a required (output) DC voltage. These power converters typically use on or more switching networks, known as inverters. Each of the inverters has one or more switching transistors for chopping the input DC voltage into a high frequency square wave. The high frequency square wave is then fed into a power isolation transformer where it is stepped up or down to a predetermined value. The resulting waveform is then rectified and filtered to produce the required DC output voltage.
A controller may be used to compare the output voltage to a desired (i.e., setpoint) output voltage and to adjust the gain of the inverter(s) based on the comparison until the actual output voltage is substantially equal to the desired (setpoint) voltage. The gain of an inverter may be defined as the ratio of the AC output voltage to the DC input voltage.
The controller adjusts the output voltage of the power converter by varying the switching frequency (i.e., frequency modulation) or duty cycle (i.e., pulse width modulation or PWM) of the control signals applied to the switching transistors of the switching network(s). In the PWM control scheme, a square wave pulse is generated to turn the switching transistor(s) on or off. By varying the width of the pulse with respect to a fixed wave period, the conduction time of the transistor can be increased or decreased, thereby regulating the output voltage. Typically, the generated pulses are derived from a square wave having a duty cycle below 50 percent, which allows a certain amount of "deadtime" to prevent simultaneous conduction (and consequent short circuiting) by multiple switching transistors of a switching network due to non-ideal (i.e., non-instantaneous) switch state transitions. A disadvantage of this type of duty cycle control (i.e., PWM) is that during the half load period, or when the duty cycle is less than 50 percent, the high frequency voltage across the primary winding of the transformer is undefined and depends upon the circuit topology. This may cause high frequency ringing and oscillations.
To overcome these disadvantages, a wide variety of circuit topologies have been devised to improve the power density and/or efficiency of power converters. Power density, measured in Watts per unit volume, is one of the most important considerations in high power DC to DC power converter design. Passive elements, such as inductors and transformers, can be reduced in size by increasing the frequency of the signals passing through these elements. Unfortunately, as the switching frequency increases, the performance of the power converter is limited by losses in the switching devices and by parasitic losses associated with components and circuit layout.
Transistor switching losses occur during the finite amount of time required to turn the transistor "on" or "off". The type of power converter described above is known as a "hard switching" power converter since the transistors are turned off and on regardless of the energy they must dissipate during the switching transition.
Under ideal switch-off (opening) conditions, the current through a transistor would instantaneously drop to zero while the voltage across the transistor would instantaneously jump to the DC Supply (input) voltage. Under ideal switch-on (closing) conditions, the voltage across the transistor would instantaneously drop to zero. Under these ideal conditions, the power dissipation (P=iV) during switching transitions would always be zero, since either the voltage or current would equal zero. However, transistors have finite (i.e., non-instantaneous) switch-on (closing) and switch-off (opening) times and maximum ratings for current and voltage changes over time (di/dt and dv/dt, respectively). Switching losses in excess of the maximum ratings impair the reliability and performances of the transistor (due to heat generation, for example).
Since power converters typically have switching transistors connected in series with a transformer, the leakage inductance of the transformer is charged while the transistor is conducting. When the base or gate of the transistor receives a turn-off signal and the transistor begins to cease conduction (initiates opening), the voltage across the transistor begins to rise. Unfortunately, the current through the transistor is sustained by the collapsing field of the charged leakage inductance of the transformer. The switch-off (opening) switching interval losses are due to the temporal overlap of falling current through the transistor and rising voltage across the transistor. The average of this (switching) loss over multiple switching cycles can be two to four times as large as the power dissipated (due to parasitics) during the transistor conduction time. This switching loss is an AC power dissipation which increases as the switching frequency increases. During the switch-on interval (closing) of the transistor, the large instantaneous impedance of the transformer leakage inductance slows the current rise time and reduces the voltage across the transistor to close to zero.
One prior art method to reduce such switching losses and the associated stress to the switch is to use a "snubber circuit" connected across the transistor to keep the dv/dt value within the maximum allowable rating of the transistor. For example, as shown in FIG. 1, an RCD (Resistor-Capacitor-Diode) snubber has a series connected resistor R and capacitor C coupled across the current carrying path of the transistor Q. A diode D is connected in parallel with the resistor and biased to conduct during transistor switch-off (open) when the leakage inductance of the transformer is releasing its energy as discussed above. During this switch-off transition, the capacitor C absorbs the leakage current of the inductor and the resistor R dissipates the energy that would otherwise be dissipated within the transistor. Upon transistor switch-on (closing), the charged capacitor C will release its stored energy as a current. Unfortunately, the RCD snubber does not reduce net switching losses. Instead, it merely shifts the power dissipation from the transistor Q to the snubber resistor R. Thus, the RCD snubber merely reduces switching stresses on the switch. Moreover the resistor R dissipating the power loss must be of sufficient size and power rating.
As with the RCD snubbers, prior art circuits for non-dissipatively snubbing switching transistors use a capacitor to slow the dv/dt value of the switching transistor. However, the energy stored in the capacitor has to either be dissipated in the switch during turn-on or converted into electromagnetic energy in the form of stored current in an inductor. This stored current is later discharged back into the inverter's DC source. The non-dissipative snubber technique, while utilizing energy which would otherwise be lost, disadvantageously increases the design complexity and cost of the inverter by adding inductive elements to the circuit. In addition, use of these non-dissipative techniques in "totem-pole" circuits, such as half-bridge and full-bridge inverters for example, is not feasible because these circuits use more than one switching element and therefore need more inductors to implement the above concept.
Other prior art techniques used to decrease switching losses include Zero Voltage Switching (ZVS) and Zero Current Switching (ZCS) in which the transistors are only switched between their conducting (closed) and non-conducting (open) states when there is substantially zero voltage across (or current through) the transistor. An example of these techniques is the resonant power converter (series or parallel) (see FIG. 2), in which a resonant tank circuit having an inductive element L and capacitive element C is placed in series or in parallel with the output of the switching network(s) to form an underdamped circuit. Accordingly, the current through the transistors of the switching network has a sinusoidal waveshape and predictably falls to zero due to the natural (i.e., inherent) characteristics of the circuit, at which time the transistors may be safely switched off or on. The output of a resonant power converter is adjusted by varying the switching frequency of the switching network(s). Specifically, as the switching frequency approaches the resonant frequency of the resonant tank circuit, the gain of the power converter increases toward its maximum. Unfortunately, variable frequency control and operation necessitates a more complex filter design which results in increased cost and decreased reliability. Another disadvantage with resonant power converters is that they produce a sinusoidal wave output. As a consequence, with resonant power converters, relatively large passive components are required to form the resonant elements compared with the passive components of inverters having a square wave output. Specifically, to deliver the same amount of energy to the load, the magnitude of the peak current level of a sinusoidal current waveform must be greater than the peak current level of a square-shaped current waveform.
Soft switching power converters overcome the need for higher peak currents by utilizing predominantly square switching waveforms with resonant transitions. These power converters are characterized by intrinsic modes of operation which allow an automatic and lossless resetting of snubber elements by appropriately recirculating stored energy. The energy may be stored by the snubber elements or any of the parasitic elements, such as the leakage inductance or interwinding capacitance of the power transformer or the stored charge in any of the semiconductor devices. A ZVS soft switching converter will use purely capacitive snubbers while a ZCS soft switching converter will use purely inductive snubbers.
As shown in FIG. 3, a standard full bridge hard switching power converter with a transformer-coupled output may be modified to operate as a ZVS soft switching power converter by adding an individual control means to each switch of a switching network. In this mode of operation, each switching transistor (Q.sub.A, Q.sub.B, Q.sub.C, Q.sub.D) will be snubbed by a capacitor (C.sub.A, C.sub.B, C.sub.C, C.sub.D) and an anti-parallel diode (D.sub.A, D.sub.B, D.sub.C, D.sub.D). When either of the diagonal pairs of transistors of the bridge (Q.sub.A and Q.sub.D, or Q.sub.B and Q.sub.C) are conducting, current flows through the primary of the power transformer (T.sub.p), charging the leakage inductance of the transformer and magnetically coupling power to the load. Between these "power" modes, the switching transitions are sequenced to allow the energy stored in the leakage inductance of the transformer to circulate to discharge the snubbing capacitors of the next transistors to be turned on. When these capacitors are discharged, the snubbing diodes become forward biased and the transistors may be turned on without significant switching stresses. The pulse width of the output of the power converter is adjusted by a controller (not shown) in response to the required output level.
If the output voltage is initially too high, the pulse width of the control signals applied to the switching transistors responsively decreases as the output voltage approaches (decreases to) the desired (setpoint) voltage. At low output levels, the pulse width may be very narrow, resulting in shorter pulses of charging current applied to the leakage inductance and correspondingly lower energy storage. ZVS is maintained only as long as the energy stored in the leakage inductance is greater than that required to discharge the snubbing capacitors of the next transistors to be turned on. Unfortunately, at low output levels, the energy stored in the leakage inductance may be insufficient to maintain ZVS (i.e., to discharge the snubbing capacitors of the next transistors to be turned on). Consequently, switching losses and possible transistor damage may occur.
To prevent this possible loss of ZVS at low output levels, prior art circuits inserted an additional inductor (L.sub.1) in series with the transformer primary T.sub.p (see FIG. 4). This improvement provided additional energy storage and allowed ZVS operation at lower output power levels than before. Unfortunately, the series inductor added cost and only succeeded in lowering, not eliminating, the minimum output level for ZVS. That is, ZVS operation can not be maintained at no load conditions in the power converter of FIG. 4.
The energy stored in the transformer (and in the series inductor) leakage inductance during the power mode may also be increased by increasing the peak current through these elements during the power mode of operation. Unfortunately, increasing the primary current has several negative effects, including increasing the size of the primary conductor means and increasing I.sup.2 R power losses.
In view of the above mentioned problems with existing DC to DC power converters, a need exists for a soft-switching DC to DC power converter which allows zero voltage switching (ZVS) from no load operation to full load operation. Such a power converter should operate at a fixed frequency above the audible range. The power converter should also minimize Radio Frequency Interference (RFI) and Electro-Magnetic Interference (EMI) without requiring complicated filtering and shielding.